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Y. You1, J. Chen1,2, Y. Feng2, Y. Tang2, D. Huang1, W. Rui1, D. Gong3, T. Liu3 and J. Ye3
Published 9 March 2015 •
© 2015 IOP Publishing Ltd and Sissa Medialab srl
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Topical Workshop on Electronics for Particle Physics
Citation Y. You et al 2015 JINST 10 C03013
DOI 10.1088/1748-0221/10/03/C03013
173 Total downloads
We present a wideband low-jitter LC-VCO phase-locked loop in 130 nm CMOS technology for high speed serial link applications. The PLL covers a 5.6 GHz to 13.4 GHz frequency range by using two LC-VCO cores with an RMS jitter of 370 fs. The single event effects testing is performed with a neutron beam at Los Alamos National Laboratory and no frequency disturbance is found over the test period. The PLL consumes 50.88 mW of power under a 1.2 V power supply.
