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ALICE inner tracking system readout electronics prototype testing with the CERN ``Giga Bit Transceiver''

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Published 28 December 2016 • © CERN 2016 for the benefit of the Alice collaboration.
, , Topical Workshop on Electronics for Particle Physics (TWEPP2016) Citation J. Schambach et al 2016 JINST 11 C12074 DOI 10.1088/1748-0221/11/12/C12074

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Author affiliations

1 Department of Physics, The University of Texas at Austin, 2515 Speedway, Austin, TX, U.S.A.

2 Department of Physics, Scientific Instrumentation, Utrecht University, Sorbonnelaan 4, Utrecht, Netherlands

3 EP Department, CERN, CH-1211 Geneva 23, Switzerland

4 The Institute of Electronic Systems, Warsaw University of Technology, Nowowiejska 15/19, Warsaw, Poland

5 Department of Computer Sciences, University of Salzburg, Jakob-Haringer-Str. 2, Salzburg, Austria

6 Department of Digital Design, Czech Technical University in Prague, Thákurova 9, Praha, Czech Republic

7 Department of Nuclear Spectroscopy, Nuclear Physics Institute ASCR, \vRež 130, \vRež, Czech Republic

Dates

  1. Received 14 November 2016
  2. Accepted 17 December 2016
  3. Published

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1748-0221/11/12/C12074

Abstract

The ALICE Collaboration is preparing a major detector upgrade for the LHC Run 3, which includes the construction of a new silicon pixel based Inner Tracking System (ITS). The ITS readout system consists of 192 readout boards to control the sensors and their power system, receive triggers, and deliver sensor data to the DAQ. To prototype various aspects of this readout system, an FPGA based carrier board and an associated FMC daughter card containing the CERN Gigabit Transceiver (GBT) chipset have been developed. This contribution describes laboratory and radiation testing results with this prototype board set.

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10.1088/1748-0221/11/12/C12074