A high-speed DAQ framework for future high-level trigger and event building clusters

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Published 6 March 2017 © 2017 IOP Publishing Ltd and Sissa Medialab srl
, , Topical Workshop on Electronics for Particle Physics (TWEPP2016) Citation M. Caselle et al 2017 JINST 12 C03015 DOI 10.1088/1748-0221/12/03/C03015

1748-0221/12/03/C03015

Abstract

Modern data acquisition and trigger systems require a throughput of several GB/s and latencies of the order of microseconds. To satisfy such requirements, a heterogeneous readout system based on FPGA readout cards and GPU-based computing nodes coupled by InfiniBand has been developed. The incoming data from the back-end electronics is delivered directly into the internal memory of GPUs through a dedicated peer-to-peer PCIe communication. High performance DMA engines have been developed for direct communication between FPGAs and GPUs using "DirectGMA (AMD)" and "GPUDirect (NVIDIA)" technologies. The proposed infrastructure is a candidate for future generations of event building clusters, high-level trigger filter farms and low-level trigger system. In this paper the heterogeneous FPGA-GPU architecture will be presented and its performance be discussed.

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10.1088/1748-0221/12/03/C03015